Continuing miniaturization of cantilever probes imposes new challenges for their positioning and fixing within a probe apparatus. Cantilever probes are commonly fixed with their peripheral ends having their cantilever portion with the contacting tip freely suspended to provide the required flexibility. To provide sufficient positioning accuracy, the fixture portion of the cantilever probe is commonly extensively dimensioned, which in turn consumes extensive real estate forcing multilayer cantilever probe assemblies with varying cantilever geometries. Such varying cantilever geometries result in different deflection behavior and limited average positioning accuracy of all cantilever probes of a probe apparatus. In addition, cantilever probes of the prior art are commonly fixed in a surrounding fashion along a linear fixture element, which requires additional surrounding referencing and/or positioning structures, which in turn consume additional space between the cantilever probes.
Prior art cantilever probes are commonly fabricated with lengthy peripheral structures for a sufficient fanning out between the ever decreasing test contact pitches and circuit board contacts of the probe apparatus. Peripheral fan-out structures may be a multitude of the cantilever portion, which reduces the positioning accuracy of the ever decreasing cantilevers and contacting tips.
For the reasons stated above, there exists a need for a cantilever probe and probe assembly that provides maximum contacting tip accuracy together with homogeneous deflection behavior within a minimum footprint. In addition, cantilever probes may be simple and highly consistent in geometry for inexpensive mass production. Other affiliated structures of the probe apparatus may be inexpensively fabricated to accommodate for highly individualized probe apparatus configurations. Embodiments of the present invention address these needs.
The testing of semiconductor wafers and other types of integrated circuits (ICs), collectively known as devices under test (DUTs), needs to keep pace with technological advances. Each IC has to be individually tested, typically before dicing, in order to ensure that it is functioning properly. The demand for testing products is driven by two considerations: new chip designs and higher volumes. As chips become increasingly powerful and complicated, the need for high-speed probe card devices to test them becomes more and more deeply felt.
In particular, chips are getting smaller and they have more tightly spaced conductive pads. The pads are no longer located about the circuit perimeter, but in some designs may be found within the area occupied by the circuit itself. As a result, the density of leads carrying test signals to the pads is increasing. The pads themselves are getting thinner and more susceptible to damage during a test. Meanwhile, the need to establish reliable electrical contact with each of the pads remains.
A well-known prior art solution to establishing reliable electrical contact between a probe and a pad of a DUT involves the use of probes that execute a scrub motion on the pad. The scrub motion removes the accumulated oxide layer and any dirt or debris that acts as an insulator and thus reduces contact resistance between the probe and the pad. For information about corresponding probe designs and scrub motion mechanics the reader is referred to U.S. Pat. No. 5,436,571 to Karasawa; U.S. Pat. Nos. 5,773,987 and 6,433,571 both to Montoya; U.S. Pat. No. 5,932,323 to Throssel and U.S. Appl. 2006/0082380 to Tanioka et al. Additional information about the probe-oxide-semiconductor interface is found in U.S. Pat. No. 5,767,691 to Verkuil.
In order to better control the scrub motion, it is possible to vary the geometry of the contacting tip of the probe. For example, the radius of curvature of the tip may be adjusted. In fact, several different radii of curvature can be used at different positions along the probe tip. For additional information about probe tips with variable radii of curvature the reader is referred to U.S. Pat. No. 6,633,176 and U.S. Appl. 2005/0189955 both to Takemoto et al.
Although the above-discussed prior art apparatus and methods provide a number of solutions, their applications when testing conductive pads that are thin or prone to mechanical damage due to, e.g., their thickness or softness is limited. For example, the above probes and scrub methods are not effective when testing DUTs with low-K conductive pads made of aluminum because such pads are especially prone to damage by probes with tips that either cut through the aluminum or introduce localized stress that causes fractures. In fact, a prior art solution presented in U.S. Pat. No. 6,842,023 to Yoshida et al. employs contact probe whose tip tapers to a sloping blade or chisel. The use of this type of probe causes a knife edge and/or single point of contact effects to take place at the tip-pad interface. These effects can causes irreversible damage to pads, especially low-K conductive pads made of aluminum or soft metal. On the other hand, when insufficient contact force is applied between the probe tip and the pad, then the oxide and any debris at the probe-pad interface will not be efficiently removed.
The problem of establishing reliable electrical contact with fragile conductive pads remains. It would be an advance in the art to provide are probes that can execute effective scrubbing motion and are self-cleaning, while at the same time they do not cause high stress concentration in the pad. Such probes need to be adapted to probe cards for testing densely spaced pads.